The present invention generally relates to fabrication of semiconductor devices and more particularly to a fabrication process of a semiconductor device including the step of forming a metal film on a barrier conductor layer by way of a CVD process.
In the fabrication process of semiconductor devices such as a wafer process, various metal films or patterns are formed on a substrate such as a Si wafer or a glass slab for providing interconnection. In the process of forming such metal films, it is practiced to provide a barrier conductor layer between the metal film and the underlying insulating layer such that diffusion of metal ions from the metal film into the underlying insulating layer is effectively blocked. Although the barrier conductor layer is generally called “barrier metal,” various conductive compounds such as tungsten nitride (WN) are used for this purpose. Thus, the barrier metal layer is referred to in this specification as a barrier conductor layer.
A tungsten nitride layer may be formed by a CVD process of tungsten hexafluoride (WF6) and ammonia (NH3), or by a PVD process. Further, a metal film is provided on such a barrier conductor layer by various processes including a CVD process, a PVD process, or an electroplating process. By patterning such a metal film together with the underlying barrier conductor layer, interconnection patterns connecting various elements of the LSI are formed.
With the advancement in the art of device miniaturization, the number of the interconnection patterns formed on an LSI is increasing. Associated therewith, the density of the interconnection patterns is also increasing. By using a metal film such as a Cu film formed by a CVD process, it is possible to form the interconnection patterns on an LSI with large density and decreased pitch. On the other hand, the use of such a metal film formed by a CVD process raises the problem of peeling-off of the metal film, particularly when a CMP process is applied thereto in a process such as a dual damascene process. Further, such a poor adhesion between the metal film and the barrier conductor layer can become the cause of disconnection or short-circuit inside an LSI.
In the case the metal conductor layer is formed by a PVD process, this problem of poor adhesion is generally avoided. However, a PVD process is not a suitable process for forming densely arrayed interconnection patterns due to the problem of poor step coverage.
The reason why the adhesion of the metal conductor layer changes depending on the method of forming the metal conductor layer is understood as follows. In the case a metal film is formed by a PVD process, the amount of impurity elements incorporated into the metal film is very small. In the case the metal film is formed by a CVD process, on the other hand, the metal film tends to incorporate various impurity elements such as C or F, originating from the organic source compounds used in the CVD process, therein.
Meanwhile, recent, leading edge LSIs use a so-called multilayer interconnection structure for interconnecting various elements formed in the LSI electrically. In such a multilayer interconnection structure, plural interconnection layers are provided with intervening interlayer insulation films interposed therebetween. In order to interconnect different interconnection layers with each other or to interconnect an interconnection layer to a part of the active element such as a diffusion region formed in a substrate, the multilayer interconnection structure generally includes a number of contact holes or via holes filled with a conductive plug of Al or Cu.
In the case of advanced LSIs having a very large integration density and complex interconnection pattern, the diameter of the contact hole is decreased according to the design rule for increased integration density, while the depth of the contact hole is increased as a result of increase of the number of the interconnection layers used in the multilayer interconnection structure. As a result, there occurs an increase of aspect ratio (depth/diameter ratio) in such contact holes.
It should be noted that a metal film and a barrier conductor layer are provided so as to cover the bottom surface and the sidewall surface of contact holes also in the case the contact holes have a very large aspect ratio. In view of superiority of step coverage, the metal film and the barrier conductor layer are preferably formed by a CVD process, particularly when the contact hole has a large aspect ratio as noted before. Typically, a tungsten nitride film or a tantalum nitride (TaN) film formed by a CVD process is used for the barrier conductor layer while a Cu film formed by a CVD process is used for the metal film. On the other hand, such a conventional contact structure has suffered from the problem of poor adhesion as long as the barrier conductor layer and the metal film are formed by a CVD process.